VP of Platform

Neurophos - Austin, TX

Hiring: VP of Platform Company: Neurophos Location: Austin, TX Job Posted Time: 2026-09-10 13:48:01 Employment Type: Full-time Target Skills & Keywords : AI, Assembly, Firmware, Node.js, PCB, Systems Engineering About the job Experience: •15+ years hardware development — BS/MS in EE/ME or equivalent track record. Required Skills: •Austin, TX or Sunnyvale, CA. Full-time onsite position. •Boards, interconnect & fabric: the accelerator baseboard, module carrier, and front-panel boards (with on-board power and signal & power integrity), the electrical interfaces between modules, the PCIe host interface, and the scale-out fabric (leaf/TOR topology, oversubscription, intra-rack cabling, frontend and management network). •Electrical closure: the end-to-end power architecture from the rack DC inlet to point-of-load (regulation, transient budget, protection coordination) and the end-to-end high-speed channel budgets across the full link. •Integration & bring-up: hardware/firmware/software system bring-up and board/system validation. •System reliability: the top-down system RAS (reliability, availability, serviceability) budget and its flowdown to module allocations. •Org & program: build and lead the Systems team and own schedule and budget. •Phase gates: EVT/DVT/PVT design sign-off. •Rack/cluster integration (L11/L12) for AI training/inference deployments. Qualifications: •Shipped server/rack products at volume through an ODM/OEM/CM or a hyperscaler/DGX-class program, with design ownership. •Fluent from L1–L10. From component/PCB through full server-node assembly and validation. •Extensive direct line management experience and have run a hardware engineering organization from near-scratch to scale. •Real NPI scars — owned EVT/DVT/PVT gates, spin decisions, and qualification. •Board & system-electrical depth — layout direction, on-board power, SI/PI, high-speed interfaces (PCIe Gen6/7, Ethernet/OSFP), and validation. •End-to-end channel & power closure — with owned link budgets for high-speed interfaces (PCIe Gen6/7, 800G+ Ethernet) and an end-to-end power architecture, not just board-level SI/PI. •Operates well in a defined-interface organization — comfortable owning deep electrical authority while designing to interface definitions and product envelopes set by other teams. •System-architecture ownership — has owned or led rack/tray/board architecture. Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!