Hiring: Staff Digital Design Engineer Company: Renesas Electronics Location: Chandler, AZ Job Posted Time: 2026-09-03 10:55:47 Employment Type: Remote Target Skills & Keywords : ASIC, Embedded Systems, Microsoft Excel, SystemVerilog, User Experience, Verilog About the job Experience: •10 years of digital design experience in one of the following areas: wireless handheld, data conversion, and power management. Required Skills: •Renesas Electronics is seeking a highly skilled and motivated Staff Digital Design Engineer to join our growing hardware development team in Chandler, AZ. In this role, you will be responsible for designing power and area-optimized digital circuits for complex mixed-signal applications. •· Interpret high level requirements to architect, design & integrate low-power digital circuits for mixed-signal data conversion and power management products in advanced process nodes. •· Support full product lifecycle from concept to mass-production; communicating closely with wider organization through the various stages of silicon development. •· Provide technical leadership & influence to the digital design team by contributing to technical discussions & reviews, mentoring junior engineers, and supporting recruitment. •· Work closely with Analog and Verification engineers to deliver high-quality silicon solutions. •· Ensuring digital development process is state-of-art and achieves budget, schedule, and project deliverable goals. •· Designing digital RTL that meets timing, area, power and any adhering standards specifications. •· Integrating design at the top level and running block & top-level simulations. Qualifications: •· >10 years of digital design experience in one of the following areas: wireless handheld, data conversion, and power management. •· Degree-level qualification in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related discipline. •· Fluent in Verilog / SystemVerilog RTL for digital CMOS circuit design. •· Strong understanding of ASIC design methodology. •· Strong understanding of Lint, CDC & RDC tools. •· Strong understanding of block-level & chip-level verification techniques. •· Strong & proven ability to debug both RTL & gate-level simulations. •· Mandatory competence in written and verbal English. •· Willingness to travel domestically or internationally on short notice. •· Ability to work independently and collaboratively. Compensation: •Flexible work environment (work from home / hybrid options) Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!