Hiring: Staff Design Verification Engineer (AI/ML) Company: Analog Devices Location: Chandler, AZ Job Posted Time: 2026-09-14 13:57:16 Target Skills & Keywords : Python, SystemVerilog, Verilog About the job Experience: •Strong proficiency in SystemVerilog and UVM with experience building coverage-driven verification environments for mixed-signal products •Demonstrated ability to deliver verification through tape-out sign-off and production release •Solid Python scripting skills with experience applying AI/ML techniques to enhance verification productivity •Knowledge of formal verification, assertion-based methodology, and clock domain crossing analysis •Proficiency with Cadence verification tools: Xcelium (simulation), JasperGold (formal verification) Required Skills: •Develop and execute verification plans, defining coverage models and success metrics for mixed-signal IC blocks and subsystems •Build and maintain SystemVerilog/UVM testbenches, monitors, scoreboards, and automated checkers for mixed-signal verification •Perform functional coverage analysis and drive coverage closure toward tape-out readiness •Support silicon correlation by comparing simulation expectations against lab measurements and refining tests based on results •Participate in verification reviews, contributing technical analysis on coverage completeness and methodology improvements •Partner cross-functionally with design, applications, and test teams to ensure verification reflects real use-cases and operating conditions Qualifications: •Curiosity and initiative to explore AI/ML techniques and emerging tools that can transform verification workflows, with an enthusiasm for discovering more effective ways of working •Strong analytical and problem-solving abilities •Demonstrated capacity to work effectively in a collaborative team environment •Application of AI/ML-driven workflows for regression analytics, failure classification, and debug acceleration •Block-level and subsystem-level verification ownership from specification analysis through coverage closure •Mixed-signal verification environment development including analog behavioral modeling and digital-analog interface checking •Test plan authoring, coverage model implementation, and regression management •Share AI/ML-driven improvements to verification workflows and best practices with team members •Interface directly with design, applications, and test teams to translate product requirements into verification coverage that reflects real operating conditions •Contribute to verification reviews and cross-team technical discussions Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!