Hiring: Sr. Memory Designer Company: Lattice Semiconductor Location: San Jose, CA Job Posted Time: 2026-09-03 03:05:30 Target Skills & Keywords : Embedded Systems, FPGA, R About the job Experience: •10 years of experience in memory design, verification, validation, and integration •Over 10 years of experience in memory design, verification, validation, and integration Required Skills: •Sr. Memory Designer •Design and Development: Lead the design and development of custom circuits for high-speed and low-power SRAM and low-power configuration RAM (CRAM) •Architecture and Implementation: Develop memory architectures and implement them in advanced semiconductor technologies, including FinFET and nanometer CMOS •Simulation and Verification: Perform schematic capture, simulation, and margin verification of major memory blocks •Layout Planning: Oversee layout planning and ensure tight pitch-matched memory layout designs •Collaboration: Work closely with architecture and design teams to define memory PPA (Performance, Power, Area) and yield targets •Full Design Flow: Manage the full embedded memory design flow, including architecture, circuit design, physical implementation, compiler usage, characterization, timing, and model generation •Innovation: Bring innovative and revolutionary ideas to life in our products, influencing various parts of our FPGA designs Qualifications: •Education: Bachelor’s degree in electrical engineering, or a related field. A Master’s or PhD is preferred •Experience: Over 10 years of experience in memory design, verification, validation, and integration •Practical experience utilizing large density memory cell design for high yield •Knowledge of semiconductor device fundamentals Compensation: •Competitive benefits and rewards package Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!