Sr. Design Verification Engineer - Digital

Semtech - San Diego, CA

Hiring: Sr. Design Verification Engineer - Digital Company: Semtech Location: San Diego, CA Job Posted Time: 2026-09-16 14:16:23 Employment Type: Hybrid Target Skills & Keywords : EDA, Embedded Systems, Firmware, Python, SystemVerilog, Verilog About the job Experience: •8+ years of industry experience in integrated circuit design verification (DV) Required Skills: •Interface with system, digital hardware, embedded firmware, analog and cross functional teams. (10%) •Supervise and mentor junior verification engineers. (15%) •Drive adoption of advanced verification methodologies, best practices and tool evaluation. (5%) •Support silicon lab evaluation, performance characterization and debug. (5%) •Technical support to test, product and application engineers. (5%) Qualifications: •In-depth knowledge and experience in digital IC verification for mixed-signal ICs with MCU based hardware systems (ARM, RISC-V, PIC, STM32) with memories, custom digital micro-architecture, interfaces, dedicated hardware peripherals, embedded signal processing, external IPs, and analog peripherals. •Proficiency in SystemVerilog as a high-level verification language with strong UVM implementation skills, Verilog for RTL comprehension and gate-level debug, Python scripting for verification automation, and industry-leading EDA verification tools (Synopsys VCS, Cadence Xcelium, Siemens Questa). •Strong analytical, synthesis and problem solving skills •Demonstration of technical leadership •Independent, self-motivated, rigorous, innovating, team player and able to follow through •Excellent verbal and written communication skills •B.S. or M.S. in Electrical or Computer Engineering •Familiarity consuming analog behavioral models (SV-RNM, Verilog-AMS) provided by analog design teams to verify digital control logic and mixed-signal interfaces •Formal verification experience using JasperGold, Synopsys VC Formal, or equivalent (property checking, FSM verification, protocol compliance) •Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) sign-off experience using SpyGlass CDC, JasperGold CDC, or equivalent Compensation: •$130,000 - $200,000 / year Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!