Senior Principal Engineer- SoC/Chip Lead
Renesas Electronics - San Jose, CA
Hiring: Senior Principal Engineer- SoC/Chip Lead Company: Renesas Electronics Location: San Jose, CA Job Posted Time: 2026-09-16 17:55:47 Target Skills & Keywords : ASIC, Agile, Embedded Systems, Firmware, Node.js, Risk Management, SOC, Stakeholder Management About the job Experience: •20+ years of semiconductor industry experience with substantial leadership responsibility. Required Skills: •Own end-to-end technical leadership and execution of complex SoC programs from architecture through silicon production. •Drive SoC planning, integration strategy, execution schedules, risk management, and tape-out readiness. •Lead cross-functional teams across digital design, verification, physical design, DFT, firmware, validation, packaging, and product engineering. •Define chip-level architecture, integration requirements, performance targets, and power/area objectives. •Drive technical decision-making and trade-off analysis across architecture, implementation, and product requirements. •Oversee subsystem and IP integration, ensuring successful deployment of complex multi-domain SoCs. •Partner with analog and SerDes teams to integrate high-speed interfaces and mixed-signal subsystems into the overall chip architecture. •Lead design reviews, execution reviews, silicon readiness assessments, and post-silicon debug activities. Qualifications: •Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or related discipline. •Proven experience as a Chip Lead, SoC Lead, Technical Program Lead, or equivalent role for large-scale ASIC/SoC products. •Demonstrated success leading advanced-node SoCs, preferably at 3nm and/or 5nm technology nodes •Comprehensive expertise in SoC architecture, integration methodologies, and full-chip development flows. •RTL Design, Design Verification, Physical Design, DFT, Static Timing Analysis, Low-Power Design Methodologies and Silicon Bring-up and Productization. •Strong communication, stakeholder management, and engineering leadership skills. •Data movement and interconnect fabrics •Complex multi-die or chiplet-based architectures Compensation: •$230,000 - $300,000 / year •Competitive benefits and rewards package •This position is also eligible for bonus opportunities Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!