Hiring: RISC-V CPU Microarchitecture / RTL Company: Tenstorrent Location: Santa Clara, CA Job Posted Time: 2026-09-13 12:54:08 Employment Type: Remote Target Skills & Keywords : SystemVerilog, VHDL, Verilog About the job Required Skills: •RISC-V CPU Core Unit RTL Design: The candidate will be responsible for the quality of RTL including design verification and PPA closure. This includes writing RTL, reviewing / refining unit verification environment, applying right RTL optimization to control PPA. •AI Assisted Design Adaption: To maximize the team’s output, the candidate actively uses AI tools to accelerate the CPU design process. •Mentoring Junior Engineers: depending on a seniority of the engineer, the engineer may mentor junior members in the team. Qualifications: •Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. •Demonstrated success in designing high-performance CPU RTL for x86, Arm, POWER, SPARC, or RISC-V. •Comprehensive expertise in design verification strategy and trade-offs for verification methodology (simulation, formal, various checkers, etc…) •Comprehensive expertise in CPU microarchitecture and PPA trade-off. •Basic understanding of RISC-V Architecture including V-extension is preferred. •Proficiency in hardware description languages (HDLs) such as Verilog, SystemVerilog or VHDL. •Excellent problem-solving abilities and analytical skills. •Strong communication skills, with the ability to convey complex technical concepts to diverse audiences. •Demonstrated capacity to work collaboratively in a team-oriented environment and across multiple disciplines. Compensation: •$100,000 - $500,000 / year •Flexible work environment (work from home / hybrid options) Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!