Hiring: Physical Design / Implementation Lead Company: Neurophos Location: Sunnyvale, CA Job Posted Time: 2026-09-10 12:28:22 Employment Type: Full-time Target Skills & Keywords : AI, Node.js, SOC About the job Required Skills: •Austin, TX or San Jose, CA. Full-time onsite position. •Own physical design and implementation end-to-end, from synthesis through tapeout, on leading-edge process nodes (TSMC N3 strongly preferred; deep FinFET-class experience, 7nm–3nm, required). •Optimize and automate our synthesis flow, and lead the intake of new process technology as we bring on new nodes. •Optimize and automate the timing closure process at the block and subsystem level •Design and optimization of power and clock architecture distribution networks. •Own the integration of analog/mixed-signal components into the digital implementation flow, building the process and working relationship between analog and digital teams. •Own physical verification and IP/library management for the digital design org. •Build and lead a physical design team: hire, ramp, and manage the engineers under you as the group scales. Qualifications: •Track record leading physical design / implementation on large, complex SoCs through tapeout: as a back-end lead on a large SoC, or an equivalent composite of synthesis, timing closure, power, and physical-verification ownership at a senior level. •Hands-on experience on advanced nodes; TSMC N3 strongly preferred, FinFET-class node experience (7nm–3nm) required. •Deep power and clock design experience at scale, ideally from CPU-class or very large SoC work. •A track record of leading and growing a team. Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!