Hiring: Physical Design Engineer Company: Tenstorrent Location: Santa Clara, CA Job Posted Time: 2026-09-10 12:54:08 Employment Type: Hybrid Target Skills & Keywords : ASIC, Node.js, Perl, Python, SOC About the job Required Skills: •BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. •Expertise with industry-standard tools (FusionCompiler, PrimeTime, RedHawk) and scripting languages (Tcl, Perl, Python). •Comprehensive expertise in advanced node challenges and low-power design techniques (power gating, multi-Vt, voltage scaling). •How to implement cutting-edge AI accelerators, high-performance CPUs and the SOCs that host them on the most advanced process nodes. •Innovative PPA optimization techniques and methodologies for next-generation chiplet architectures. •End-to-end ownership from flow development to signoff in collaboration with architecture and IP teams. •Direct impact on products that are redefining the landscape of AI and high-performance computing. Qualifications: •A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. •Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. •Strong problem solver who excels at debugging complex issues across design hierarchies. •Collaborative team player who thrives in fast-paced, technically challenging environments. Compensation: •$100,000 - $500,000 / year Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!