Hiring: Memory Electrical Validation Engineer Company: Intel Location: Hillsboro, OR Job Posted Time: 2026-09-03 02:23:51 Employment Type: Internship / Hybrid Target Skills & Keywords : Compliance, Firmware, Python, TestNG About the job Experience: •Understanding platform level signal integrity and power integrity technologies a definite asset •Practical experience utilizing validation of high-speed I/O interfaces, including understanding of Tx, Rx, PLL, DLL, Clocking, and Equalization •Knowledge of computer architecture (CPU, DDR Memory technologies) and software/firmware architecture (bios, firmware debug experience) •Hands-on experience of validation & debug using tools such as Oscilloscopes, Signal generators, BERT, and Logic analyzers •Familiarity of Server/Xeon Memory RAS features Required Skills: •This role requires regular onsite presence to fulfill essential job responsibilities. •Defines electrical validation strategy for memory IO interfaces to achieve optimized electrical performance and meet product production goals. •Validates circuit analog performance, electrical signal integrity compliance to industry standard specifications, and system level margin for stable operation and production target prediction. •Defines MRC (Memory Reference Code) requirements for validation and margin optimization and analyzes, validates, debugs, and optimizes MRC steps and values to optimize margins and quality. •Conducts and participates in multidisciplinary research in the design, development, testing, validation, and utilization of memory IO and mixed signal architectures inclusive of industry standard datacom applications and custom Intel interfaces. •Develops procedures, analysis, and designs for validation, validation infrastructure, and systems margin validation. •Analyzes internal and external customer returns with emphasis on improving yields and driving test escape closure. •Applies and uses independent evaluation to select components and equipment based on analysis of specifications, performance, and reliability. Qualifications: •Bachelors or Master's degree in electrical engineering or physics or computer engineering or another relevant field •5+ years of experience in Memory/DDR technology •5+ years of hands-on validation and debug experience at system level and memory interfaces •5+ years of experience with industry-standard JEDEC memory protocols and test methodologies Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!