Hiring: Memory Design Engineer Company: Mirafra Technologies Location: Austin, TX Job Posted Time: 2026-09-16 10:44:36 Target Skills & Keywords : EDA, Perl, Python, Shell About the job Experience: •6–8+ years of hands-on experience in custom memory circuit design and characterization. •Proven experience working with advanced technology nodes (e.g., 7nm, 5nm, 3nm, GAA/A14, or FinFET/FDSOI nodes). •Expertise in SRAM, MRAM, RF Memory, multi-port, and high-density memory topologies. •Cadence Virtuoso, Spectre, HSPICE, Solido Required Skills: •Design, simulate, and optimize custom memory circuits (SRAM, MRAM, Register Files, 4-Port HC SRAM, and multi-port/dual-pump architectures). •Perform bitcell margin analysis, evaluating read stability, writability, and yield using Read/Write Assist Techniques (e.g., NBL, TVC). •Execute rigorous signoff checks including Signal Integrity (SI), Crosstalk, On-Chip Variation (OCV), EMIR, Aging/Reliability, and timing margin analysis. •Lead timing, power, and noise characterization for memory blocks and compilers across PVT corners. •Develop and maintain memory compilers; perform SPF hacking/customization, custom simulation setups, and script-driven data and report analysis. •Utilize EDA industry-standard tools for schematic capture, layout verification, circuit simulation, and static timing analysis. Qualifications: •Bachelor’s or Master’s/Ph.D. degree in Electrical Engineering, Computer Engineering, Microelectronics, or a related technical field. Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!