Hiring: Digital Verification Engineer Company: Neuralink Location: San Francisco, CA Job Posted Time: 2026-09-16 12:34:28 Employment Type: Full-time Target Skills & Keywords : ASIC, C++, FPGA, GNU Make, Makefile, Perl, Python, SOC, Shell, SystemVerilog About the job Experience: •3 years of experience in digital ASIC verification. •Minimum 3 years of experience in digital ASIC verification. Qualifications: •Functional modeling experience and logic verification with SystemVerilog, SystemC/C++. •Exposure with low power formal verification flows •Strong hands-on experience in verification methodologies such as UVM •Knowledge of ARM/RISC-V processor, AMBA bus •Knowledge of power aware verification Compensation: •Excellent medical, dental, and vision insurance through a PPO plan Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!