Hiring: DFT Engineer (CE-64000920) Company: Cirrus Logic Location: Chandler, AZ Job Posted Time: 2026-09-10 03:05:30 Target Skills & Keywords : ASIC, EDA, Make, Perl, Python, SOC, SystemVerilog, VHDL, Verilog About the job Experience: •2+ years of experience or BS with relevant industry experience. Required Skills: •Work within a collaborative team environment to define, implement, and review DFT features. •Generate, insert, and verify Memory BIST logic. •Perform scan insertion and ATPG pattern generation. •Help develop and review DFT timing and equivalence checking constraints. •Perform MBIST and ATPG pattern verification with gate level simulations. •Identify and improve any test coverage gaps. •Perform test cost planning and analysis. •Deliver MBIST and ATPG patterns to the product test group and support silicon bringup on the ATE. Qualifications: •MSEE with 2+ years of experience or BS with relevant industry experience. •Possess strong hands on working knowledge on ASIC DFT design and verification. •Proven hands-on experience in industry standard EDA tools for DFT such as FastScan, TestKompress, TetraMAX, Test Compiler etc. •Practical experience utilizing Verilog, System Verilog, or VHDL. •Understanding of low power test techniques and architectures. •Knowledge of scripting languages such as Perl, Python, or TCL. •Practical experience utilizing synthesis, static timing analysis, and developing timing constraints. •Strong oral and written communication skills. •Practical experience utilizing flows and automation. •Work independently as well as part of a team. Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!