Hiring: DDR PHY Signal Integrity and Power Integrity Engineer Company: Saicon Location: Santa Clara, CA Job Posted Time: 2026-09-12 12:28:23 Employment Type: Hybrid Target Skills & Keywords : Firmware, MATLAB, Python About the job Experience: •Strong coding skills in Python and Matlab preferred •Signal integrity (SI) and power integrity (PI) knowledge, including S-parameter/Z-parameter analysis, channel modeling, and PDN modeling •Knowledge of Ansys or Cadence simulation tools (e.g., HFSS, SIwave, Sigrity, Clarity) •System-level experience with firmware and hardware debug expertise preferred •System modeling with silicon-to-simulation correlation Required Skills: •As a member of the CT Server DDR team, we are looking for an experienced signal integrity and power integrity engineer who can be responsible for DDR PHY channel and power delivery network (PDN) architecture, system-level SI/PI, and post-silicon validation. •Run system-level channel and PDN simulations (insertion/return loss, crosstalk, eye diagrams, impedance, IR drop, jitter transfer) and correlate with silicon results •Able to process post-silicon SI/PI validation data and drive the next steps •Debug SI/PI issues across silicon, package, and board, working with firmware and design teams •Support cross-functional teams with system, channel, PDN, and decoupling implementation details Qualifications: •Bachelors or Masters degree in Computer Engineering/Electrical Engineering Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!