Hiring: AI/ML ASIC Architect Company: Sandisk Location: Milpitas, CA Job Posted Time: 2026-09-16 13:57:16 Employment Type: Remote Target Skills & Keywords : ASIC, Embedded Systems, FPGA, Firmware, LLM, SOC About the job Experience: •15+ years of hands-on Architecture experience authoring specifications Required Skills: •Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. •Lead and oversee driving the AI/ML ASIC architecture that integrates the AI Storage with GPU/TPU/xPU accelerators, with a particular focus on I/O subsystems connected over UCIe/ PCIe/CXL •Author architecture specifications in clear and concise language for AI/ML xPU based Accelerator using AI Storage Solutions. •Define I/O subsystem and PCIe DMA architectures, including their interactions with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric. •Create flexible and modular I/O subsystem architectures that can be deployed in either Chiplet, monolithic or 3D form factors. •Interface directly with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. •Define SoC subsystem and DMA hardware, software, and firmware interactions with embedded processing subsystems and SoC CPUs on the device side and Host CPUs. •Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase. Qualifications: •Bachelors or Masters or PhD in Computer/Electrical Engineeringwith 15+ years of hands-on Architecture experience authoring specifications •Strong technical background architecting ASIC, SoC, or I/O subsystems involving PCIe/UCIe/CXL and DMA engines •Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPU •Good understanding of computer/graphics architecture, ML, LLM •Architecting an GPU/TPU/xPU Accelerator systems with optimized high bandwidth memory hierarchy and frontend architecture for multi-trillion parameter LLM training/inference including Dense, Mixture of Experts (MoE) with multiple modalities (text, vision, speech) •KV cache optimization, Flash Attention, Mixture of Experts •Deep experience optimizing large-scale ML systems, GPU architectures •Proficiency in principles and methods of microarchitecture, software, and hardware relevant to performance engineering •Knowledge of ARM Processors and AXI Interconnects •Familiarity and background in UCIe, CXL, NVLink, or UAL microarchitecture and protocolsis a plus Compensation: •$194,425 - $322,092 / year Interested candidates, please apply directly through the job posting on company's career page or try via AI auto apply on this platform. Don't miss this opportunity to join a forward-thinking team!